UPSC Recruitment Paper 2018 :  Lecturer (Computer Engineering)

UPSC recruitment



UPSC Recruitment Paper 2018 :  Lecturer

(Computer Engineering)



1. A model which is used to understand the design of a data structure to indicate an implementation-independent view of the data structure is:
(a) Linear data type
(b) Non- linear data type
(c) Abstract data type
(d) Primitive data type

2. Which one of the following  search algorithms cannot be applied to a sorted linked list?
(a) Sequential search algorithm
(b) Iterative search algorithm
(c) Recursive search algorithm
(d) Binary search algorithm

3. In a queue an element can be added arbitrarily and from which only either the smallest or largest element can be removed, the type of the queue is: 
(a) Circular queue
(b) Priority queue
(c) Deques
(d) Ordinary queue

4. Postfix notation is also  known as:
(a) Reverse polish notation
(b) Polish notation
(c) Infix notation
(d) Reverse notation

5. Which one of the following structure is not used for storing strings?
(a) Fixed-length- structures
(b) Variable-length- structure with fixed maximums
(c) Variable-length- structure with fixed minimums
(d) Linked- structures

6. What is the throughput, if Bus clock is 8.33 MHz , 32 bit-data wide (parallel), synchronous mode?
(a) 269 MBps
(b) 267 MBps
(c) 33 MBps
(d) 31 MBps

7. Few addressing modes, fixed instruction size and use more registers for separate memory operations are the features of: 
(a) CISC
(b) RISC
(c) RAID
(d) DMA

8. A block set-associative cache consists of a total of 64 blocks divided into  four-block sets. The main memory contains 4096 blocks, each consisting of 128 words. The number of bits in main memory address will be:
(a) 17 bits
(b) 18 bits
(c) 19 bits
(d) 20 bits

9. If the average page-fault service time of 20 ms, a MAT of 80 ns and the probability of a page fault is 10 %. An effective access time will be:
(a) 2,000,672 ns
(b) 2,000,072 ns
(c) 2,000,036 ns
(d) 2,000,006 ns

10. For a bus frequency of 100 MHz and with data being transferred at 64 bits at a time. The DDR SDRAM gives a transfer rate of:
(a) 800 MB/S
(b) 1600 MB/S
(c) 3200 MB/S
(d) 6400 MB/S 

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